Method for producing a component having a semiconductor substrate and component

ABSTRACT

A method for producing a component having a semiconductor substrate, in which porous semiconductor material is generated for the purpose of developing at least one thermally decoupled pattern. In the material that has been rendered porous, a recess or a plurality of recesses is/are etched to produce at least one region that is defined by the one recess or the plurality of recesses and is thermally decoupled. On the at least one region, the pattern to be thermally decoupled is then formed.

FIELD OF THE INVENTION

The present invention relates to a method for producing a structuralelement having a semiconductor substrate and a component.

BACKGROUND INFORMATION

In the production of components based on thermal effects, methods inbulk micromechanics are mostly used. For this, expensive etchingtechniques having a high degree of complexity are typically required, inorder to be able to lay bare a thin diaphragm on the front side of thewafer, by etching from the rear through a whole semiconductor wafer,which is used for thermal decoupling from structures mounted on it.

Alternatively, the two methods below may be used:

-   -   a) oxidized porous silicon (OxPorSi) and    -   b) oxidized silicon crosspieces (OXOMM, oxidized surface        mechanics).

With respect to the two alternatives, processes for thermal decouplingare involved that are limited to purely front side processes. Themethods have the advantage of a higher mechanical stability of thethermally decoupled region, and thus a higher overall stability of thecomponent.

In the “OxPorSi” method, a relatively thick and poorly heat conducting(0.3 to 1 W/mK) porous silicon layer is generated which may, inaddition, also be oxidized. Such layers are used, for example, for thethermal decoupling of sensor structures or actuator structures inthermal components, such as thermal, chemical, fluidic sensors and gassensors.

A flow sensor is described in German Patent Application No. DE 100 58009 A1, especially for the analysis of gas flows, that has a supportingbody and at least one sensor component that is sensitive to the flow ofa medium. The sensor component is separated, from area to area, from thesupporting body by a porous silicon region or a porous silicon oxideregion.

During the production of porous semiconductors, such as porous silicon,generally, an electrochemical reaction between hydrofluoric acid andsilicon is used, during which a sponge-like structure is formed in thesilicon. For this, the silicon semiconductor substrate (generally, asilicon wafer) has to be polarized anodically with respect tohydrofluoric acid electrolyte. As a result of the generation of a porousstructure, the silicon develops a large internal surface and otherchemical and physical properties (such as a lower heat conductivity),than the surrounding bulk silicon. By electrochemical etching of thesilicon (anodizing) in, for instance, a mixture of hydrofluoric acid andethanol, porous silicon may be generated by partial etching proceedingmore deeply. For the etching of silicon, defect electrons (holes) arenecessary at the interface between the silicon and the electrolyte,which are made available by the flowing current. If the current densityis less than a critical current density, holes diffuse to recesses lyingin the surface, because of the applied electrical field, and there apreferred etching takes place. In the case of, for example, p-dopedsilicon, the regions between the recesses are etched laterally up to aminimum thickness, until no more holes can penetrate into these regionsbecause of quantum effects, and the etching process is stopped. In thismanner, a sponge-like skeleton structure is created, made of silicon andetched-free pores. During the formation of the skeleton structure, sincethe etching process takes place only in the area of the tips of thepores, the spongy structure of the silicon already etched is maintained.Along with that too, the size of the pores in the regions already etchedremains nearly unchanged. The size of the pores depends on the HFconcentration in the hydrofluoric acid, on the doping and on the currentdensity, and can amount to from a few nanometers to a few 10 μm.Likewise, the porosity can be set in a range from ca. 10% to more than90%.

Various doped substrates can be used for producing porous silicon.Normally, one would use p-doped wafers having different degrees ofdoping. The pattern within the porous silicon can be determined by thedoping.

There are various masking methods for the local production of poroussilicon, such as the use of masking layers made of Si_(X)N_(Y).

However, one may also make use of the fact that p-doped and n-dopedsilicon have greatly different etching behavior. With the conditionsunder which porous silicon can be generated in p-doped silicon, inn-doped silicon this is not possible, or possible only to a smallextent. Therefore, a layer at the surface of the p-doped substrate canbe n-redoped for the purpose of determining the sensor element patterns(by ion implantation or diffusion).

For the production of components, the porous silicon is regularlygenerated locally on a silicon substrate in thicknesses of several toseveral 100 μm. By an oxidation process at temperatures such as 300 to500° C., the porous silicon may be stabilized in its structure and itsheat conductivity may be further reduced, depending on porosity andcrystal size. Oxidized porous silicon is created. Subsequently, in oneapplication, the oxidized porous silicon is closed off using a coverlayer, for instance, made of CVD (chemical vapor deposition) materialssuch as Si_(X)N_(Y). Thereafter, using conventional depositingtechniques and patterning techniques, one may build up the active orsensitive elements, such as heaters and/or measuring elements, above theregion that has been rendered porous.

In the “OXOMM” method, trenches from several μm to several 100 μm areetched into the silicon by a deep etching process, so that siliconlattices, silicon crosspieces or free-standing silicon columns arecreated. These are oxidized to a higher valency completely or onlypartially, in order to reduce their thermal conductivity.

Thereafter, the trenches are regularly closed off by a CVD layer, andthe surface is planarized if necessary, in order to apply the active andsensitive elements.

SUMMARY

An object of the present invention is to make available components inwhich thermal effects are used and which include a semiconductormaterial substrate, which have improved properties compared tocomponents produced based on an “OxPorSi” or “OXOMM” method.

The present invention relates to a method for producing the componenthaving a semiconductor substrate, in which porous semiconductor materialis generated for the development of at least one thermally decoupledpattern. In accordance with an example embodiment of the presentinvention, in the material that is rendered porous, a recess or severalrecesses is/are etched, in order to generate at least one thermallydecoupled region of the ones specified by the one recess or the severalrecesses, and, over the at least one region, the at least one pattern isextended.

This procedure is based on the knowledge that the components, both usingthe “OxPorSi” method and the present example method, do not achieve thequality of the thermal decoupling of a dielectric disphragm produced byBMM technology, since both by the OxPorSi and by the crosspiecescomparatively much heat is dissipated. For example, to achieve aconstant overtemperature on OxPorSi of a thickness of 100 μm having aheat conductivity of 0.5 W/mK and 1 mm² extension, a 5-fold heatingpower is required as with a pattern produced by bulk micromechanics. Ifthe two methods are combined, one obtains a pattern which, in comparisonwith a pure OXCOMM pattern, has a clearly lower vertical heatconductivity, and has almost ideal lateral insulating properties.

From the semiconductor that has been rendered porous, one may generate,for example, trenches, crosspiece patterns, columns that are arranged ina matrix-like fashion using corresponding recesses, on whose surface thepatterns that are to be thermally decoupled are able to be mounted.

Stabilization and possibly further reduction of the verticalconductivity (that is, perpendicular to a semiconductor substrate) ofthe material regions that have been rendered porous may be achieved inthat the semiconductor material that has been produced and renderedporous is at least partially oxidized after the application of therecesses, such as trenches.

However, oxidation of the semiconductor material that has been renderedporous may also be accomplished by the etching of recesses.

In one preferred specific embodiment of the present invention, the oneor several recesses are etched over a thickness of the material that hasbeen rendered porous only to a depth so that a desired lateral thermaldecoupling takes place. It has been shown that a large part of the heatdissipates already in the first 5 to 30 μm depth of the patterns, sothat it may be sufficient for a desired thermal functionality to patternthe material that has been rendered porous only over a correspondingpart of the thickness, such as 50 μm. With that, depending on thethickness of the material that has been rendered porous, residualthicknesses of the material that has been rendered porous may remain.

Hard-surface masks or resist masks may be used to produce locallylimited semiconductor material that has been rendered porous.Hard-surface masks may normally remain in the layer construction, sincethe patterns made of material that has been rendered porous areregularly closed off using an insulating cover layer before the buildingup of additional patterns.

In order further to improve the lateral thermal decoupling, it is alsoadvantageous, especially in the case in which the masking remains in thelayer structure, if the masking is underetched during the patterning ofthe regions rendered porous, by etching recesses. Therefore, because ofthe remaining masking, in spite of the greater lateral distances betweenthe regions rendered porous, no greater lateral gaps have to be closedby the cover layer, because the opening width is determined by the mask.

An additional improvement in the thermal decoupling may be achieved byunderetching isotropically at least one region, defined by one and/orseveral recesses in the base region, made of material that has beenrendered porous. This procedure may be preferably applied especially ifthe material rendered porous is completely etched through with respectto the one or the several recesses, so that, in the base region, thereis bulk semiconductor material that has not been rendered porous, whichis able to be etched with great selectivity, particularly to form anoxidized pattern that has been rendered porous.

One is thereby able to generate completely self-supporting structureswhich, however, for stability reasons, should be laterally anchored.

Furthermore, the present invention relates to a component having asemiconductor substrate in which, for the development of at least onethermally decoupled pattern, at least one region that has been renderedporous made of a semiconductor material that has been rendered porous orthat has been rendered porous and has been partially oxidized, isprovided, to which the pattern, to be thermally decoupled, has beenapplied. In this component, the at least one region that has beenrendered porous is separated from the surrounding material in thelateral direction at least partially by a cavity which is many timesgreater than the pores of the region that has been rendered porous.

As was mentioned above, in this manner, the good insulating propertiesof a trench structure in the lateral direction may be combined by animproved vertical insulation based on material that has been renderedporous, especially the good mechanical stability of such a constructionbeing still able to be used.

The construction is of advantage particularly if several regions thathave been rendered porous are present, which are separated at least inone direction by cavities. The component may, for example have aplurality of columns which have been rendered porous over at least apart of their height. However, a crosspiece structure is perhaps alsosufficient, i.e., a structure which has a lateral connection to the bulkmaterial at sides lying opposite to each other.

Optimization with regard to lateral insulation of one or more regionsthat have been rendered porous is achieved by having the cavity extendcompletely around the one or the several regions that have been renderedporous, in the lateral direction. As an example for this we may give thecolumn structure that was mentioned above.

With respect to a vertical insulation, a component may be furtherimproved if the cavity, in addition, also extends under the one or theseveral regions that have been rendered porous. For instance, a columnstructure or a crosspiece structure may be implemented in which thecolumns or the crosspieces “hang freely”.

BRIEF DESCRIPTION OF THE DRAWINGS

Several exemplary embodiments of the present invention are shown in thefigures, and are explained in greater detail below.

FIGS. 1 a-1 c show a silicon substrate for the production of a thermalcomponent having regions that have been rendered porous, each as aschematic section, at different stages of processing.

FIG. 1 d shows a production state comparable to FIG. 1 c, however,having a slightly changed process mechanism.

FIG. 2 shows a schematic sectional view of a silicon substrate duringthe production of a thermal component, using a method in which a maskremains in the layer construction.

FIG. 3 shows a schematic sectional view of a layer constructioncorresponding to FIG. 2, in which, however, structures that have beenrendered porous are executed in a freely hanging manner.

FIG. 4 shows a schematic sectional view of a silicon substrate in anfurther production state starting from the construction according toFIG. 1 d.

DESCRIPTION OF EXAMPLE EMBODIMENTS

FIGS. 1 a to 1 c show respectively, in section, the creation of athermal component based on a silicon wafer 1.

In a first step, using a mask 2, locally, porous silicon 3 is produced(see FIG. 1 a).

Onto the porous silicon, an additional mask 4 is applied (see FIG. 1 b),with the use of which trenches 5 are etched into the porous silicon 3using a DRIE process (see FIG. 1 c). Accordingly, crosspieces 6 remain,made of silicon that has been rendered porous.

Since it has turned out that, in the lateral direction, a great part ofthe quantity of heat is dissipated already at the first 5 to 30 μm depthfrom the crosspieces or columns, it is, if necessary, sufficient for adesired thermal functionality to proceed as in FIG. 1 d. Here, theporous silicon was not, as in FIG. 1 c, etched through over its wholethickness d, but only over a part of thickness d. Accordingly, thereremains, as shown in FIG. 1 d, a residual thickness d_(R) of poroussilicon. This has the advantage of a shorter etching time and a greaterstability of the porous structures.

In FIGS. 1 c and 1 d, the masking used for producing the porous siliconand the generation of trenches 6 has already been removed.

However, inasmuch as a “hard-surface mask” (that is, not a photoresistmask) is used for the masking, it may remain in the layer construction,even advantageously. This is shown especially in FIGS. 2 and 3.

In the generation of the thermal structures, trenches 6 are regularlyclosed, for instance, by a CVD layer (chemical vapor deposition layer).The thickness of the layer required for closing depends on the trenchwidth b of trenches 5.

A wide trench width b is of advantage for good lateral insulation, buthas a disadvantage with respect to the necessary thickness of a coverlayer 7 (see FIG. 4).

Because of the remaining masking in the layer construction, according toFIGS. 2 and 3, a process may be selected in which masking 8 ispurposefully underetched in order to achieve a width b of trenches 5.Still, width b_(CVD), that is decisive for the cover layer, is definedby mask 8.

In this way, one consequently obtains sufficiently wide trenches, but isable to work, all the same, with a comparatively thin cover layer, sincethe width b_(CVD), which is decisive in this regard, is below the widthb of trenches 5. This means that the minimum necessary layer thicknessfor closing is determined by width b_(CVD) of the mask opening ofhard-surface mask 8.

The degree of underetching may be determined to be very large, wherebycrosspieces 6, having low heat dissipation into the depth, and widetrenches are created, which ensure an almost complete lateralinsulation. In this manner, the effective porosity of the structure isincreased.

After one process state according to FIGS. 1 c, 1 d or 2, the poroussilicon is partially oxidized, for the stabilization of the pores withrespect to high temperature processes and for the further reduction ofthe heat conductivity, in a pure oxygen atmosphere, for example, at, forinstance, 300 to 500° C. Oxidized porous silicon is created.

After the oxidation, in variants according to FIG. 1 c and FIG. 2, in anadvantageous manner, the thermal decoupling may be improved even more byan isotropic etching process, for instance, using XeF₂ or ClF₃. In thiscontext, the high selectivity of the etching process, for the poroussilicon crystals that are enclosed by oxide, is utilized, which permitsa preferred etching of bulk silicon 9 under porous silicon 3 (or theporous crosspieces or columns 6). A structure is created as in FIG. 3,having free-hanging crosspieces or columns 6. For reasons of stability,only a laterally anchored column structure or crosspiece structure issuitable in this case, since the columns or the crosspieces are hangingfreely.

Before structures that are to be thermally decoupled are applied, therecesses developed in the porous silicon or the oxidized porous siliconare regularly developed, using a cover layer 7 (for this see FIG. 4),for example, in the case of crosspieces in the form of longitudinaltrenches, and in the case of columns in the form of longitudinaltrenches and transverse trenches. The cover layer may be a CVD coverlayer, such as a silicon oxide layer.

FIG. 4 shows the production state illustrated in Figure d and havingcover layer 7.

For the additional construction of the structures to be thermallydecoupled (not shown), the cover layer may additionally be planarized.

The structures to be thermally decoupled are preferably applied over theremaining structures that have been rendered porous, i.e., particularlythe columns or crosspieces.

The components to be thermally decoupled may be active or sensitiveelements, such as heating elements, measuring resistors orthermoelements. Especially heating elements and measuring resistors arepreferably applied over the regions that have been rendered porous.

Because of the procedure according to the present invention, incomparison to conventional processes, sensors that are more robust andsimpler to handle are able to be made available, especially mass flowsensors.

1-11. (canceled)
 12. A method for producing a component having asemiconductor substrate, comprising: rendering a semiconductor materialporous; etching at least one recess into the material that has beenrendered porous to generate at least one thermally decoupled regiondefined by the at least one recess; and developing at least one patternover the at least one region.
 13. The method as recited in claim 12,wherein the semiconductor material that has been rendered porous is atleast partially oxidized after the patterning.
 14. The method as recitedin claim 12, wherein the semiconductor material that has been renderedporous is at least partially oxidized before the patterning.
 15. Themethod as recited in claim 12, wherein the at least one recess is etchedover a thickness d of the material that has been rendered porous, sothat a desired lateral, thermal decoupling takes place.
 16. The methodas recited in claim 12, wherein one of hard-surface masks or photoresistmasks are used to produce the at least one recess.
 17. The method asrecited in claim 16, wherein the at least one region that is defined bythe at least one recess is underetched under the masks.
 18. The methodas recited in claim 12, wherein the at least one region that is definedby the at least one recess is underetched isotropically in a base regionfrom material that has been rendered porous.
 19. A component,comprising: a semiconductor substrate in which at least one region thathas been rendered porous; and a thermally decoupled pattern; wherein theat least one region that has been rendered porous is separated fromsurrounding material in a lateral direction at least partially by acavity, the cavity being many times larger than pores of the region thathas been rendered porous.
 20. The component as recited in claim 19,wherein the semiconductor substrate includes a plurality of regions thathave been rendered porous, the plurality of regions being separated fromone another in at least one direction by cavities.
 21. The component asrecited in claim 19, wherein the cavity extends in the lateral directioncompletely around the at least one region that has been rendered porous.22. The component as recited in claim 19, wherein the cavity is at leastpartially below the at least one region that has been rendered porous.